usrvme(7M)							    usrvme(7M)

NAME    [Toc]    [Back]

     usrvme - User level VME Bus adapter interface.

DESCRIPTION    [Toc]    [Back]

     The usrvme	interface provides access to VME bus address spaces from user
     processes.


   Challenge and Onyx Systems    [Toc]    [Back]
     On	Challenge and Onyx systems, access to VME bus address spaces are
     provided by special files.	 They're named according to the	following
     convention:

     /dev/vme/vme<adapter>a<address-space><address-mode>

     <adapter> is the number of	VME bus	adapter.
     <address-space> is	one of {16, 24,	32}.
     <address-mode> is either n	for non-privileged or s	for supervisory.

     For instance, address space 16 in non-privileged mode on adapter 0	would
     be	referred to as /dev/vme/vme0a16n.

     The kernel	driver for user	level VME is referred to as usrvme.  If	VME
     busses are	added to an existing system, it	may be necessary to run
     MAKEDEV(1M) specifying a target of	usrvme in order	to have	the additional
     /dev/vme devices created.


   Origin2000 and Onyx2	Systems
     On	Origin2000 and Onyx2 systems, VME bus address spaces can be accessed
     by	hardware graph vertices.  The vertices are named by the	following
     convention:

     /hw/vme/<adapter>/usrvme/<address-space>/<data-width>

     <adapter> is the number of	VME bus	adapter.
     <address-space> is	the code for address space.  It	could be one of
     {a32s,a32n, a24s, a24n, a16s, a16n}.
     <data-width> is the maximum PIO data width	on VME bus.  It	could be one
     of	{d64, d32, d16,	d8} in A32 space, or one of {d32, d16, d16, d8}	in A24
     and A16 spaces.


   Error Handling    [Toc]    [Back]
     Not all addresses can be read from	or written to because of read-only or
     write-only	registers and unequipped addresses. Reads or writes to invalid
     VME bus addresses will normally result in a SIGBUS	signal being sent to
     the offending process.

     On	CHALLENGE, ONYX, Origin2000, and ONYX2 systems,	writes to an invalid
     VME bus address are asynchronous, processor does not wait for the



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usrvme(7M)							    usrvme(7M)



     completion	of write operation.  If	write operation	fails, it could	take
     up	to 10 millisecs	for the	user VME process to be signalled about failed
     write.  (Note that	VME bus	timeout	is about 80 microsecs on Challenge and
     Onyx systems, 64 microseconds on Origin2000 and Onyx2 systems.)  So, if
     the user VME process has to confirm that the write	completed
     successfully, it should wait for about 10 millisecs.  If the user VME
     process has already terminated by the time	kernel gets the	VME write
     error interrupt, a	message	is sent	to SYSLOG indicating the VME Adapter
     number, and failed	VME bus	address.

     If	multiple processes have	the mapping for	the VME	address	which got an
     error, all	of them	would be sent SIGBUS signal.

SEE ALSO    [Toc]    [Back]

     "IRIX Device Driver Programmer's Guide"
     hinv(1M)
     MAKEDEV(1M) -- on Challenge and Onyx systems.


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